Striving for Perfection in Patterning for Quantum Lithography with Erik Hosler

Patterning precision underpins every breakthrough in quantum photonic devices, where sub-micron features guide individual photons and define qubit performance. Erik Hosler, a lithography process specialist at PsiQuantum, recognizes the critical need to adapt and refine semiconductor patterning techniques for quantum hardware fabrication. His perspective bridges decades of lithography expertise with the emerging demands of quantum photonics.

In quantum lithography, even nanometer-scale deviations can sabotage coherence or introduce loss. Translating idealized device layouts into physical chips requires not only tight control over line-edge roughness and overlay accuracy but also robust methods to monitor and correct deviations in real-time. The following exploration highlights the end-to-end patterning challenges from resist chemistry through etch processes to multilayer alignment and outlines strategies that move us closer to the “perfection” quantum systems demand.

The Stakes of Nanometer-Scale Precision

Quantum photonic waveguides and resonators depend on smooth, well-defined sidewalls. Unlike digital logic, which can tolerate minor dimension shifts, quantum interconnects require near-ideal geometry to maintain phase coherence and minimize scattering. Patterning errors manifest as insertion loss, unwanted mode coupling, or phase jitter, all detrimental to qubit fidelity and device yield.

Consequently, the lithography process must achieve:

• Line-Edge Roughness (LER) < 2 nm rms.

• Overlay Accuracy < 20 nm.

• Critical Dimension Uniformity (CDU) ±5 nm.

Meeting these targets at scale pushes current lithography tools and process chemistries to their limits.

Advanced Resist Formulations and Development

At the core of pattern fidelity lies the photoresist. Quantum lithography benefits from resist blends engineered for:

1. High Resolution: Low molecular-weight polymers reduce stochastic effects.

2. Low LER: Uniform polymer chain lengths and optimized additives minimize edge roughness.

3. Anti-Reflective Properties: Underlayers absorb stray light, preserving feature fidelity.

Resist development parameters, developer concentration, temperature, and time must be finely tuned. Too aggressive a development step can produce dangling polymers and rough edges; too gentle and incomplete feature definition occurs. Process teams run design-of-experiments (DoE) to map development windows that deliver both sharp contrast and smooth contours.

Etch and Deposition Nuances

Pattern transfer from the resist to the substrate introduces its own set of challenges. Dry etch chemistries (e.g., fluorine-based plasmas) must strike a balance between anisotropy and sidewall passivation:

• Anisotropic Profiles: Vertical sidewalls preserve waveguide geometry.

• Minimal Roughness: Low ion energy and controlled gas flows prevent micro-mask formation.

• Selectivity: High resist-to-substrate etch selectivity guards against dimensional loss.

When depositing cladding or encapsulation layers, conformal methods such as Atomic Layer Deposition (ALD) maintain film uniformity over high-aspect-ratio features. However, ALD throughput is inherently slow, prompting hybrid strategies that combine ALD for critical layers with faster CVD processes for bulk films.

Multilayer Alignment and Overlay Control

Quantum photonic chips often integrate multiple patterning steps, waveguide cores, grating couplers, or active electro-optic modulators stacked across several layers. Each layer must align within tight tolerances:

• Front-to-Back Overlay: Ensures that buried structures line up with top-side waveguides.

• Intra-Layer Alignment: Guarantees consistent feature placement across scribe lines and reticle fields.

Advanced alignment systems use high-precision interferometers and real-time field distortion correction. Metrology targets embedded across the wafer provide feedback to correct for stage drift, thermal expansion, and lens aberrations. By closing the loop between exposure and measurement, fabs can hold overlay within the 10–20 nm window required for coherent photonic operation.

Inline Metrology and Statistical Process Control

Rapid detection of pattern deviations is essential to prevent yield loss. Inline metrology tools include:

• CD-SEM: Measures critical dimensions with sub-nanometer precision.

• Scatterometry: Infers film thickness and profile shape by analyzing diffraction signatures.

• AFM: Captures three-dimensional surface topography for spot-check validation.

Statistical Process Control (SPC) charts monitor key metrics, CD, LER, and overlay across each batch. When metrics drift beyond control limits, automated alerts trigger process adjustments, such as tweaking focus, exposure dose, or developer strength. This proactive approach reduces scrap rates and accelerates process qualification.

Balancing Throughput and Precision

Commercial viability demands both high yield and reasonable throughput. Quantum photonic wafers cannot spend days under the scanner for metrology, nor can they cycle through dozens of development steps. Process engineers optimize:

• Exposure Dose: Finding the lowest dose that still yields crisp features reduces tool wear and cycle time.

• Resist Coating and Bake: Fast-ramp bakes with optimized ramps prevent resistance to flow while preserving adhesion.

• Cluster Tools: Integrating lithography, development, and etch in a single tool minimizes wafer handling and thermal loading.

By pooling metrology and exposure tools into high-utilization clusters, fabs keep cycle times competitive without compromising the nanometer-scale precision that quantum devices require.

Leveraging Semiconductor Innovation

Quantum lithography increasingly draws on advances from leading-edge CMOS fabs:

• EUV Lithography: Though primarily used for sub-10 nm logic, EUV offers advantages in LER and single-exposure patterning if adapted to quantum-scale feature sets.

• Immersion Techniques: Higher numerical aperture and immersion fluids can improve resolution for dense photonic circuits.

• Advanced Mask Materials: Low-expansion substrates and reflective mask blanks reduce thermal distortion during exposure.

PsiQuantum’s collaboration with semiconductor foundries enables access to these tools and process flows, bringing the best practices of digital chipmaking to quantum photonics.

Collaborative Process Development

Achieving patterning excellence requires tight integration between device physicists, lithographers, and fabrication engineers. Regular cross-functional workshops align design tolerances with process capabilities.

Device models feed into lithography simulation tools, predicting how mask errors or lens aberrations impact device performance. This collaborative loop accelerates convergence on process recipes that meet both optical performance and manufacturability goals.

Emerging Techniques: NIL and DSA

Beyond traditional photolithography, novel methods are under exploration:

• Nanoimprint Lithography (NIL): Creates smooth, high-fidelity patterns by mechanically embossing resists.

• Directed Self-Assembly (DSA): Uses block copolymers to form uniform nano-patterns with minimal LER.

While these techniques require new tooling and integration schemes, they hold promise for pushing pattern quality beyond current optical limits, potentially reducing reliance on multi-pass overlays.

Mid-Article Perspective on Perfection

Despite our best efforts, perfection remains an aspirational target. Erik Hosler emphasizes, “We’d like to see perfection in our patterning, but we’ll settle for striving for perfection.”

This pragmatic mindset focuses on identifying the most sensitive patterning parameters, LER, overlay, and CDU, and allocating resources to tighten control where it matters most. By accepting minor deviations in less critical areas, teams can concentrate on the “happy path” features that determine qubit coherence.

Scaling Quantum Fabrication

As PsiQuantum and peers ramp up wafer volumes, process robustness will define commercial success. Key milestones include:

1. Demonstrating sub-2 nm LER across 300 mm wafers

2. Maintaining overlay within 15 nm for multilayer photonic circuits

3. Achieving >90% functional yield on waveguide arrays

4. Integrating NIL or DSA modules into pilot production lines

Each achievement tightens the gap between research prototypes and field-deployable quantum processors.

The Endless Pursuit of Precision

Quantum lithography demands a level of patterning control that stretches existing semiconductor processes to their limits. Through advanced resist chemistry, fine-tuned etch recipes, rigorous inline metrology, and collaboration across design and fabrication domains, we move ever closer to the “perfection” required for large-scale quantum photonic devices.

The journey is continuous; every nanometer of improvement unlocks greater coherence and brings practical quantum computing within reach.